ALIGN: Analog Layout, Intelligently Generated from Netlists

ALIGN is an open source automatic layout generator for analog circuits jointly developed under the DARPA IDEA program by the University of Minnesota, Texas A&M University, and Intel Corporation.

The goal of ALIGN is to automatically translate an unannotated (or partially annotated) SPICE netlist of an analog circuit to a GDSII layout. The repository also releases a set of analog circuit designs.

Get started:

• ALIGN: flow
• Installation
• Introduction by Example
• Layout viewer
• Constraints
• PDK abstraction
• Cell generator

Datasets:

• Examples
• Database

Notes:

• Contribute to ALIGN
• ALIGN gallery

MISC:

• Installation debug
• Frequently Asked Questions

Indices and tables

• Index

• Module Index